1. Field
This patent specification relates to a method and apparatus for outputting a constant voltage to a load by using a differential amplifier circuit.
2. Discussion of the Background
In recent years, a lithium ion battery has been widely used as a power source for mobile devices. The operating voltage of the lithium ion battery is about 3.7 V, which is approximately three times of an operating voltage of a Ni—Cd battery or a nickel hydride battery. Therefore, the lithium ion battery can reduce the number of batteries used in a mobile device. Further, the lithium ion battery is light in weight. Accordingly, the lithium ion battery contributes to reduction in size and weight of the mobile device. When the lithium ion battery is used in the mobile device, however, an initial voltage of the lithium ion battery immediately after charging is about 4.3 V, but a final voltage of the battery after discharging is reduced to about 3.2 V. Therefore, the voltage of the lithium ion battery may need to be stabilized by a constant voltage circuit.
FIG. 1 illustrates an exemplary configuration of a background constant voltage circuit. The background constant voltage circuit 11 includes a reference voltage source Rp, a bias voltage source Bp, a differential amplifier circuit Damp, an amplifier circuit Vamp, an output voltage control transistor M8, output voltage detection resistors R1 and R2, and a current adjustment transistor M7. The constant voltage circuit 11 receives a voltage VBAT from a power source P and outputs an output voltage Vout to a load Lo.
The differential amplifier circuit Damp performs a differential amplifying operation and outputs a voltage generated through the operation. The amplifier circuit Vamp then amplifies the voltage output from the differential amplifier circuit Damp. The output voltage control transistor M8, which may be a P-channel MOSFET (metal-oxide semiconductor field-effect transistor), for example, serving as an output voltage control device, receives the voltage amplified by the amplifying circuit Vamp and outputs an output voltage Vout to the load Lo. The output voltage detection resistors R1 and R2 detect and divide the output voltage Vout to generate a divided voltage. The divided voltage and a reference voltage Vref output from the reference voltage source Rp are input in the differential amplifying circuit Damp and used for the differential amplifying operation.
The differential amplifier circuit Damp includes two differential input transistors M1 and M2, a current regulation transistor M5 and a current mirror circuit Cm1.
The differential input transistors M1 and M2 may be N-channel MOSFETs, for example, and the current regulation transistor M5 may be an N-channel MOSFET, for example, serving as a current regulation device driven by a bias voltage Vbi1 output from the bias voltage source Bp.
The current mirror circuit Cm1 includes two transistors M3 and M4 connected to the power source P. The transistors M3 and M4 may be P-channel MOSFETs, for example. Each of the transistors M3 and M4 has a source connected to the power source P, and a gate connected to a drain of the transistor M3. Further, drains of the transistors M3 and M4 are connected to drains of the differential input transistors M1 and M2, respectively.
The differential input transistor M1 has a gate connected to a positive terminal of the reference voltage source Rp. Meanwhile, the other differential input transistor M2 has a gate connected to an output voltage dividing point between the output voltage detection resistors R1 and R2. Sources of the differential input transistors M1 and M2 are connected to a drain of the current regulation transistor M5.
The current regulation transistor M5, the drain of which is connected to both of the sources of the differential input transistors M1 and M2, has a gate connected to the bias voltage source Bp and a source connected to a ground voltage terminal GND. The current regulation transistor M5 regulates a drain current Id1 of the differential input transistor M1 and a drain current Id2 of the differential input transistor M2.
Further, a current adjustment transistor M7, which may be an N-channel MOSFET, for example, serving as a current adjustment device, forms a current mirror circuit Cm2 together with the current regulation transistor M5. The current adjustment transistor M7 is connected between the amplifier circuit Vamp described below and the ground voltage terminal GND. The current adjustment transistor M7 has a gate connected to the bias voltage source Bp, a drain connected to a drain of an amplifier transistor M6, (i.e., a point Va to which an output voltage from the amplifier circuit Vamp is output) and a source connected to the ground voltage terminal GND.
The amplifier transistor M6 included in the amplifier circuit Vamp, which may be a P-channel MOSFET, for example, has a gate connected to the drain of the differential input transistor M2, and a source connected to the power source P.
The output voltage control transistor M8 has a gate connected to the drain of the amplifier transistor M6, a source connected to the power source P, and a drain connected to the predetermined load Lo via an output terminal Vr and to the output voltage detection resistors R1 and R2 connected in series.
As described above, the output voltage detection resistors R1 and R2 have the output voltage dividing point connected to the gate of the differential input transistor M2. The output voltage detection resistor R2 is connected to the ground voltage terminal GND.
Operations of the constant voltage circuit 11 of FIG. 1 are briefly described. When the output voltage Vout from the output terminal Vr is decreased for some reason, a gate voltage of the differential input transistor M2 is decreased, so that the drain current Id2 of the differential input transistor M2 is decreased and a drain voltage Vd2 of the differential input transistor M2 is increased. Since the drain voltage Vd2 of the differential input transistor M2 is also a gate voltage of the amplifier transistor M6, the gate voltage of the amplifier transistor M6 is also increased. Accordingly, a drain voltage Vd6 of the amplifier transistor M6 (i.e., an electric potential at the point Va to which the output voltage from the amplifier circuit Vamp is output) is decreased. Since the drain voltage Vd6 of the amplifier transistor M6 (i.e., the electric potential at the point Va) is output to the gate of the output voltage control transistor M8, a gate voltage of the output voltage control transistor M8 is decreased, so that the output voltage Vout from the output terminal Vr is increased to a predetermined value.
Conversely, when the output voltage Vout is increased for some reason, an inverse operation to the above-described operation is observed. That is, the gate voltage of the differential input transistor M2 is increased, so that the drain current Id2 of the differential input transistor M2 is increased and the drain voltage Vd2 of the differential input transistor M2 is decreased. Since the drain voltage Vd2 of the differential input transistor M2 is also the gate voltage of the amplifier transistor M6, the gate voltage of the amplifier transistor M6 is also decreased. Accordingly, the drain voltage Vd6 of the amplifier transistor M6 (i.e., the electric potential at the point Va to which the output voltage from the amplifier circuit Vamp is output) is increased. Since the drain voltage Vd6 of the amplifier transistor M6 (i.e., the electric potential at the point Va) is output to the gate of the output voltage control transistor M8, the gate voltage of the output voltage control transistor M8 is increased, so that the output voltage Vout from the output terminal Vr is decreased to a predetermined value.
In other words, in the above constant voltage circuit 11 of FIG. 1, even when the output voltage Vout is changed for some reason, the gate voltage of the amplifier transistor M6 is changed in an opposite direction to a direction in which the gate voltage of the differential input transistor M2 is changed in response to a change of the output voltage Vout. Therefore, the electric potential at the point Va is changed in an opposite direction to the direction in which the gate voltage of the amplifier transistor M6 is changed, and the gate voltage of the output voltage control transistor M8 is changed in the same opposite direction in which the electric potential at the point Va is changed, so that a value of the output voltage Vout from the output terminal Vr is kept constant.
However, the above background constant voltage circuit 11 has a problem that, within the differential amplifier circuit Damp, a balance is lost between the drain current Id1 of the differential input transistor M1 and the drain current Id2 of the differential input transistor M2 and thus there arises an input offset voltage, which is a difference in voltage between the gate (i.e., an input terminal) of the differential input transistor M1 and the gate (i.e., an input terminal) of the differential input transistor M2, causing deterioration in accuracy of the output voltage Vout. Mechanism of deterioration in accuracy of the output voltage Vout is explained below.
The input offset voltage is reduced by equalizing the drain current Id1 of the differential input transistor M1 with the drain current Id2 of the differential input transistor M2. The drain current Id1 becomes equal to the drain current Id2 when a drain-source voltage Vds3 and a drain-source voltage Vds4, which are respectively drain-source voltages of the transistor M3 and the transistor M4 forming the current mirror circuit Cm1, are equal. The drain-source voltage Vds3 of the transistor M3 is equal to a gate-source voltage Vgs3 of the transistor M3, and the drain-source voltage Vds4 of the transistor M4 is equal to a gate-source voltage Vgs6 of the amplifier transistor M6. Therefore, the gate-source voltage Vgs3 of the transistor M3 should be equalized with the gate-source voltage Vgs6 of the amplifier transistor M6.
The drain-source voltage Vds4 of the transistor M4, which is also the gate-source voltage Vgs6 of the amplifier transistor M6, can be expressed as in the first formula Vds4=Vgs6=−√(2×Id6/β6)+Vth6, wherein β(beta)6 is a transconductance coefficient of the amplifier transistor M6, and Vth6 is a threshold voltage of the amplifier transistor M6.
The gate-source voltage Vgs3 of the transistor M3 can be expressed as in the second formula Vds3=Vgs3=−√(2×Id3/β3)+Vth3, wherein β3 is a transconductance coefficient of the transistor M3, and Vth3 is a threshold voltage of the transistor M3.
A condition under which a value of the first formula becomes equal to a value of the second formula can be expressed as in the third formula β6/β3=Id6/Id3.
Normally, a device size of each of the differential input transistors M1 and M2, the transistors M3 and M4, the current regulation transistor M5, and the amplifier transistor M6 is determined so as to satisfy the third formula.
For example, when a lithium ion battery is used as the power source P, a voltage VBAT of the lithium ion battery starts gradually decreasing from the initial voltage of about 4.3 V down to the final voltage of about 3.2 V. When the lithium ion battery is thus discharged, the output voltage from the amplifier circuit Vamp (i.e., the voltage at the point Va) also gradually decreases. This is because a value of a gate-source voltage Vgs8 of the output voltage control transistor M8 is kept constant when a value of a current IL flowing through the load Lo is constant, as observed from the fourth formula Vgs8=−√(2×Id8/β8)+Vth8, wherein β8 is a transconductance coefficient of the output voltage control transistor M8, and Vth8 is a threshold voltage of the output voltage control transistor M8.
That is, the output voltage from the amplifier circuit Vamp (i.e., the electric potential at the point Va), which is equal to Vgs8, changes by approximately a voltage of 1.1 V from the voltage of about 4.3 V to the voltage of about 3.2 V. Further, even when the voltage VBAT of the power source P is constant, if the current IL flowing through the load Lo changes, the gate-source voltage Vgs8 of the output voltage control transistor M8 changes. As a result, the output voltage from the amplifier circuit Vamp (i.e., the voltage at the point Va) changes. The output voltage from the amplifier circuit Vamp or the voltage at the point Va is also a drain-source voltage Vds7 of the current adjustment transistor M7. Even when a gate-source voltage Vgs7 of the current adjustment transistor M7 is constant, if the drain-source voltage Vds7 of the current adjustment transistor M7 changes, a drain current Id7 of the current adjustment transistor M7 changes due to a channel length modulation effect. The change of the drain current Id7 results in a change of a drain current Id6 of the amplifier transistor M6, since the drain current Id7 of the current adjustment transistor M7 is equal to the drain current Id6 of the amplifier transistor M6.
On the other hand, a drain-source voltage Vds5 of the current regulation transistor M5 can be expressed as in the fifth formula Vds5=Vref−Vgs1=Vref−(√(2×Id1/β1)+Vth1) indicating a relationship between the reference voltage Vref and the gate-source voltage Vgs1 of the differential input transistor M1, wherein β1 is a transconductance coefficient of the differential input transistor M1, and Vth1 is a threshold voltage of the differential input transistor M1.
The gate-source voltage Vgs1 of the differential input transistor M1 takes an almost constant value. It is therefore determined from the fifth formula that the value of the drain-source voltage Vds5 of the current regulation transistor M5 is almost constant regardless of variation in the voltage VBAT of the power source P or variation in the current IL flowing through the load Lo. Accordingly, a drain current Id5 of the current regulation transistor M5 also takes an almost constant value.
As described above, the gate-source voltage Vgs6 of the amplifier transistor M6 is also the drain-source voltage Vds4 of the transistor M4. Therefore, when the gate-source voltage Vgs6 of the amplifier transistor M6 is changed, the drain-source voltage Vds4 of the transistor M4 is also changed. As a result, a drain current Id4 of the transistor M4 is changed due to the channel length modulation effect.
The drain current Id4 of the transistor M4 is equal to the drain current Id2 of the differential input transistor M2, and a sum of the drain current Id1 of the differential input transistor M1 and the drain current Id2 of the differential input transistor M2 is equal to the drain current Id5 of the current regulation transistor M5. Further, the value of the drain current Id5 of the current regulation transistor M5 is constant, as described above. Therefore, when the drain current Id2 of the differential input transistor M2 is changed, the drain current Id1 of the differential input transistor M1 is changed in an inverse direction to a direction in which the drain current Id2 is changed. As a result, a difference in voltage arises between the gate-source voltage Vgs1 of the differential input transistor M1 and the gate-source voltage Vgs2 of the differential input transistor M2. This difference in voltage results in the input offset voltage and causes a change in the output voltage Vout.
Usually, the output voltage Vout is added with a voltage value obtained by multiplying the value of the input offset voltage by (R1+R2)/R2, as an error margin.